**Transmission**:- There are two ways to move binary bits from one place to another: transmit all bits of a word simultaneously or send only 1 bit at a time. These methods are referred to, respectively, as parallel transfer and serial transfer.

In parallel data transfers, all the bits of a code word are transferred simultaneously (see Fig. 7-2). The binary word to be transmitted is usually loaded into a register containing one flip-flop for each bit. Each flip-flop output is connected to a wire to carry that bit to the receiving circuit, which is usually also a storage register. As can be seen in Fig. 7-2, in parallel data transmission, there is one wire for each bit of information to be transmitted. This means that a multi-wire cable must be used. Multiple parallel lines that carry binary data are usually referred to as a data bus. All eight lines are referenced to a common ground wire.

Parallel data transmission is extremely fast because all the bits of the data word are transferred simultaneously. The speed of parallel transfer depends on the propagation delay in the sending and receiving of logic circuits and any time delay introduced by the cable. Such data transfers can occur in only a few nanoseconds in many applications. Parallel data transmission is not practical for long-distance communication. To transfer an 8-bit data word from one place to another, eight separate communication channels are needed, one for each bit. Although multi-wire cables can be used over limited distances (usually no more than a few feet), for long-distance data communication they are impractical because of cost and signal attenuation. And, of course, parallel data transmission by radio would be even more complex and expensive, because one transmitter and receiver would be required for each bit. Over the years, data transfer rates over parallel buses have continued to increase.

For example, in personal computers bus transfer rates have increased from 33 to 66 to 133 MHz and now to 400 MHz and beyond. However, to achieve these speeds, the bus line lengths have had to be considerably shortened. The capacitance and inductance of the bus lines severely distort the pulse signals. Furthermore, crosstalk between the lines also limits the speed. Reducing the line length decreases the inductance and capacitance, permitting higher speeds. To achieve speeds up to 400 MHz, bus lengths must be limited to only a few inches. To achieve higher rates, serial data transfers are being used.

Data transfers in communication systems are made serially; each bit of a word is transmitted one after another (see Fig. 7-3). This figure shows the code 10011101 being transmitted 1 bit at a time.

The least significant bit (LSB) is transmitted first, and the most significant bit (MSB) last. The MSB is on the right, indicating that it was transmitted later in time than the LSB. Each bit is transmitted for a fixed interval of time t. The voltage levels representing each bit appear on a single data line (with respect to ground) one after another until the entire word has been transmitted. For example, the bit interval may be 10 μs, which means that the voltage level for each bit in the word appears for 10 μs. It would therefore take 80 μs to transmit an 8-bit word.

Because both parallel and serial transmission occur in computers and other equipment, there must be techniques for converting between parallel and serial and vice versa. Such data conversions are usually taken care of by shift registers (see Fig. 7-4).

A shift register is a sequential logic circuit made up of a number of flip-flops connected in cascade. The flip-flops are capable of storing a multi bit binary word, which is usually loaded in parallel into the transmitting register. When a clock pulse (CP) is applied to the flip-flops, the bits of the word are shifted from one flip-flop to another in sequence. The last (right-hand) flip-flop in the transmitting register ultimately stores each bit in sequence as it is shifted out.

The serial data word is then transmitted over the communication link and is received by another shift register. The bits of the word are shifted into the flip-flops one at a time until the entire word is contained within the register. The flip-flop outputs can then be observed and the data stored in them transferred in parallel to other circuits. These serial-parallel data transfers take place inside the interface circuits and are referred to as serializer/deserializer (SERDES) devices. Serial data can typically be transmitted faster over longer distances than parallel data. If a two-wire transmission line, rather than multiple interconnecting wires, is used, speeds over 2 GHz can be achieved over a serial link up to several feet long. If the serial data is converted to infrared light pulses, fiber-optic cable can be used. Serial data rates up to 100 GHz can be achieved at distances of many kilometers.

Serial buses are now replacing parallel buses in computers, storage systems, and telecommunication equipment where very high speeds are required. For example, suppose that you must transmit data at a rate of 400 Mbytes/s. In a parallel system you could transmit 4 bytes at a time on a 32-bit 100-MHz parallel bus. Bus length would be limited to a few inches. You could also do this serially. Remember that 400 Mbytes/s is the same as 8 3 400 Mbytes/s or 3.2 gigabits per second (Gbps) or 3.2 GHz. This rate is easily obtained serially for several feet with a copper transmission line or up to many kilometers with a fiber-optic cable.

The key to digital communication is to convert data in analog form to digital form. Special circuits are available to do this. Once it is in digital form, the data can be processed or stored. Data must usually be reconverted to analog form for final consumption by the user; e.g., voice and video must be in analog form. Data conversion is the subject of this section.

Translating an analog signal to a digital signal is called analog-to-digital (A/D) conversion, digitizing a signal, or encoding. The device used to perform this translation is known as an analog-to-digital (A/D) converter or ADC. A modern A/D converter is usually a single-chip IC that takes an analog signal and generates a parallel or serial binary output (see Fig. 7-5). The opposite process is called digital-to-analog (D/A) conversion. The circuit used to perform this is called a digital-to-analog (D/A) converter (or DAC) or a decoder. The input to a D/A converter may be a serial or parallel binary number, and the output is a proportional analog voltage level. Like the A/D converter, a D/A converter is usually a single-chip IC (see Fig. 7-6) or a part of a large IC.

An analog signal is a smooth or continuous voltage or current variation (see Fig. 7-7). It could be a voice signal, a video waveform, or a voltage representing a variation of some other physical characteristic such as temperature. Through A/D conversion these continuously variable signals are changed to a series of binary numbers. A/D conversion is a process of sampling or measuring the analog signal at regular time intervals. At the times indicated by the vertical dashed lines in Fig. 7-7, the instantaneous value of the analog signal is measured and a proportional binary number is generated to represent that sample.

As a result, the continuous analog signal is translated to a series of discrete binary numbers representing samples. A key factor in the sampling process is the frequency of sampling f, which is the reciprocal of the sampling interval t shown in Fig. 7-7. To retain the high frequency information in the analog signal, a sufficient number of samples must be taken so that the waveform is adequately represented. It has been found that the minimum sampling frequency is twice the highest analog frequency content of the signal.

For example, if the analog signal contains a maximum frequency variation of 3000 Hz, the analog wave must be sampled at a rate of at least twice this, or 6000 Hz. This minimum sampling frequency is known as the Nyquist frequency fN. (And fN ^ 2fm, where fm is the frequency of the input signal.) For bandwidth limited signals with upper and lower limits of f2 and f1, the Nyquist sampling rate is just twice the bandwidth or 2( f2 + f1). Although theoretically the highest frequency component can be adequately represented by a sampling rate of twice the highest frequency, in practice the sampling rate is much higher than the Nyquist minimum, typically 2.5 to 3 times more. The actual sampling rate depends on the application as well as factors such as cost, complexity, channel bandwidth, and availability of practical circuits.

Assume, e.g., that the output of an FM radio is to be digitized. The maximum frequency of the audio in an FM broadcast is 15 kHz. To ensure that the highest frequency is represented, the sampling rate must be twice the highest frequency: f = 2 x 15 kHz = 30 kHz. But in practice, the sampling rate is made higher, that is, 3 to 10 times higher, or 3 x 15 kHz = 45 kHz to 10 x 15 kHz = 150 kHz. The sampling rate for compact disk players that store music signals with frequencies up to about 20 kHz is 44.1 kHz or 48 kHz. Another important factor in the conversion process is that, because the analog signal is smooth and continuous, it represents an infinite number of actual voltage values. In a practical A/D converter, it is not possible to convert all analog samples to a precise proportional binary number.

Instead, the A/D converter is capable of representing only a finite number of voltage values over a specific range. The samples are converted to a binary number whose value is close to the actual sample value. For example, an 8-bit binary number can represent only 256 states, which may be the converted values from an analog waveform having an infinite number of positive and negative values between 11 V and 21 V.

The physical nature of an A/D converter is such that it divides a voltage range into discrete increments, each of which is then represented by a binary number. The analog voltage measured during the sampling process is assigned to the increment of voltage closest to it. For example, assume that an A/D converter produces 4 output bits. With 4 bits, 24 or 16 voltage levels can be represented. For simplicity, assume an analog voltage range of 0 to 15 V. The A/D converter divides the voltage range as shown in Fig. 7-8.

The binary number represented by each increment is indicated. Note that although there are 16 levels, there are only 15 increments. The number of levels is 2N and the number of increments is 2N 2 1, where N is the number of bits. Now assume that the A/D converter samples the analog input and measures a voltage of 0 V. The A/D converter will produce a binary number as close as possible to this value, in this case 0000. If the analog input is 8 V, the A/D converter generates the binary number 1000. But what happens if the analog input is 11.7 V, as shown in Fig. 7-8? The A/D converter produces the binary number 1011, whose decimal equivalent is 11.

In fact, any value of analog voltage between 11 and 12 V will produce this binary value. The quantizing error can be reduced, of course, by simply dividing the analog voltage range into a larger number of smaller voltage increments. To represent more voltage increments, a greater number of bits must be used. For example, using 12 bits instead of 10 allows the analog voltage range to produce 212 or 4096 voltage increments. This more finely divides the analog voltage range and thus permits the A/D converter to output a proportional binary number closer to the actual analog value.

The greater the number of bits, the greater the number of increments over the analog range and the smaller the quantizing error. As you can see, there is some error associated with the conversion process. This is referred to as quantizing error. The maximum amount of error can be computed by dividing the voltage range over which the A/D converter operates by the number of increments. Assume a 10-bit A/D converter, with 10 bits, 210 = 1024 voltage levels, or 1024 – 1 = 1023 increments. Assume that the input voltage range is from 0 to 6 V. The minimum voltage step increment then is 6/1023 = 5.86 x 1023 = 5.865 mV.

As you can see, each increment has a range of less than 6 mV. This is the maximum error that can occur; the average error is one-half that value. The maximum error is said to be +-1/2 LSB or one-half the LSB increment value. The quantizing error can also be considered as a type of random or white noise. This noise limits the dynamic range of an A/D converter since it makes low-level signals difficult or impossible to convert. An approximate value of this noise is

where Vn is the rms noise voltage and q is the weight of the LSB. This approximation is valid only over the bandwidth from direct current to fs/2 (called the Nyquist bandwidth). The input signal is in this range. Using the 10-bit example above, the LSB is 5.865 mV. The rms noise voltage then is

The signal to be digitized should be 2 or more times this noise level to ensure a reasonably error-free conversion. It can be shown that the overall quantization noise can be reduced by oversampling, i.e., sampling the signal at a rate that is many times the Nyquist sampling rate of two times the highest signal frequency. Oversampling reduces the quantizing noise by a factor equal to the square root of the oversampling ratio, which is fs/2fm.

To retain an analog signal converted to digital, some form of binary memory must be used. The multiple binary numbers representing each of the samples can be stored in random access memory (RAM). Once they are in this form, the samples can be processed and used as data by a microcomputer which can perform mathematical and logical manipulations. This is called digital signal processing (DSP) and is discussed in Sec. 7-5. At some point it is usually desirable to translate the multiple binary numbers back to the equivalent analog voltage. This is the job of the D/A converter, which receives the binary numbers sequentially and produces a proportional analog voltage at the output. Because the input binary numbers represent specific voltage levels, the output of the D/A converter has a stair step characteristic. Fig. 7-9 shows the process of converting the 4-bit

binary numbers obtained in the conversion of the waveform in Fig. 7-8. If these binary numbers are fed to a D/A converter, the output is a stair step voltage as shown. Since the steps are very large, the resulting voltage is only an approximation to the actual analog signal. However, the stair steps can be filtered out by passing the D/A converter output through a low-pass filter with an appropriate cutoff frequency.

**Example 7-1 **An information signal to be transmitted digitally is a rectangular wave with a period of 71.4μs. It has been determined that the wave will be adequately passed if the bandwidth includes the fourth harmonic. Calculate (a) the signal frequency, (b) the fourth harmonic, and (c) the minimum sampling frequency (Nyquist rate).

If the binary words contain a larger number of bits, the analog voltage range is divided into smaller increments and the output step increments will be smaller. This leads to a closer approximation to the original analog signal.

Whenever an analog waveform is sampled, a form of modulation called pulse-amplitude modulation (PAM) takes place. The modulator is a gating circuit that momentarily allows a portion of the analog wave to pass through, producing a pulse for a fixed time duration and at an amplitude equal to the signal value at that time. The result is a series of pulses as shown in Fig. 7-10. These pulses are passed to the A/D converter, where each is converted to a proportional binary value. PAM is discussed in greater detail later in this chapter, but for now we need to analyze the process to see how it affects the A/D conversion process. Recall from Chap. 3 that amplitude modulation is the process of multiplying the carrier by the modulating signal. In this case, the carrier or sampling signal is a series of narrow pulses that can be described by a Fourier series:

Here, υc is the instantaneous carrier voltage, and D is the duty cycle, which is the ratio of the pulse duration t to the pulse period T, or D 5 t/T. The term ωs is 2πfs, where fs is the pulse-sampling frequency. Note that the pulses have a dc component (the D term) plus sine-cosine waves representing the fundamental frequency and its odd and even harmonics. When you multiply this by the analog modulating or information signal to be digitized, you get a messy-looking equation that is remarkably easy to decipher. Assume that the analog wave to be digitized is a sine wave at a frequency of fm or Vm sin (2fmt). When you multiply that by the Fourier equation describing the carrier or sampling pulses, you get.

The first term in this equation is the original information sine signal. If we put this complex signal through a low-pass filter set to a frequency a bit above the modulating signal, all the pulses will be filtered out, leaving only the desired information signal. Looking at the complex signal again, you should see the familiar AM equations showing the product of sine and cosine waves. If you remember from Chap. 3, these sine-cosine expressions convert to sum and difference frequencies that form the side bands in AM. Well, the same thing happens here. The modulating signal forms sidebands with the sampling frequency fs or fs – fm and fs + fm. Furthermore, sidebands are also formed with all the harmonics of the carrier or sampling frequency (2fs +- fm, 3fs +- fm, 4fs +- fm, etc.). The resulting output is best shown in the frequency domain as in Fig. 7-11. We are not generally concerned about all the higher harmonics and their sidebands, for they will ultimately get filtered out. But we do need to look at the sidebands formed with the fundamental sine wave. Note in Fig. 7-11 that the Nyquist frequency is shown and the spectrum is divided into segments called Nyquist zones. A Nyquist zone is one-half the Nyquist frequency. Ideally the signal to be sampled must be less than fs/2 or in the first Nyquist zone. All is well with this arrangement as long as the frequency ( fs) or carrier is two or more times the highest frequency in the modulating or information signal. However, if the sampling frequency is not high enough, then a problem called aliasing arises. Aliasing causes a new signal near the original to be created. This signal has a frequency of fs – fm. When the sampled signal is eventually converted back to analog by a D/A converter, the output will be the alias fs – fm, not the original signal fm.

Fig. 7-12(a) shows the spectrum, and Fig. 7-12(b) shows the original analog signal and the recovered alias signal. Assume a desired input signal of 2 kHz. The minimum sampling or Nyquist frequency is 4 kHz. But what if the sampling rate is only 2.5 kHz? This results in an alias signal of 2.5 kHz – 2 kHz = 0.5 kHz or 500 Hz. It is this alias signal that will be recovered by a D/A converter, not the desired signal of 2 kHz. To eliminate this problem, a low-pass filter called an antialiasing filter is usually placed between the modulating signal source and the A/D converter input to ensure that no signal with a frequency greater than one-half the sampling frequency is passed. This filter must have extremely good selectivity. The roll-off rate of a common RC or LC low-pass filter is too gradual. Most antialiasing filters use multiple-stage LC filters, an RC active filter, or high-order switched capacitor filters to give the steep roll-off required to eliminate any aliasing. The filter cutoff is usually set just slightly above the highest frequency content of the input signal.

Sampling is the rate at which an analog input signal is measured. For each sample, a proportional binary number is generated. As you have seen, to preserve the content of the analog signal for faithful reproduction the sampling rate has to be two or more times the highest frequency content of the signal. Twice the highest frequency content is generally referred to as the Nyquist rate. For example, assume that the input signal is a 2-MHz square wave with odd harmonics. To preserve the square wave, you must include up to at least the 5th harmonic, or 10 MHz. Therefore, the minimum Nyquist sampling rate has to be at least two times 10 MHz or fs > 20 MHz. Usually the actual rate is more than two times the highest frequency in the input signal. This is called oversampling. Oversampling has both advantages and disadvantages. Sampling at a rate less than the Nyquist rate is called undersampling. As you saw earlier, under sampling causes an undesirable effect called aliasing. Yet undersampling has some interesting benefits as well as downsides.

Oversampling is desirable as it is the best way to capture, process, and retain the fi ne detail in a signal. Fast rise and fall times or narrow pulses are examples. The greater the sampling rate, the finer the granularity of the digital version of the signal. The disadvantages of oversampling include higher cost, higher power consumption, increased memory size, and increased need for faster processing. Faster ADCs simply cost more.

Furthermore, faster ADCs are normally of the flash or pipelined type with larger, more complex circuitry making them consume more power. In CMOS designs, higher operating frequencies produce more power consumption. If the signal is being stored for later, a much larger memory is needed to store the samples, further increasing cost. If the samples are to be processed in real time as they are generated, the computer processor or digital circuitry in a field programmable gate array (FPGA) must be faster, leading to increased cost. As for advantages, oversampling does preserve the signal content.

Second, oversampling makes the antialiasing filter less complex. The closer the upper frequency content is to the sampling rate, the greater the need for a very selective filter. Multiple stage filters of the elliptical type may be needed to eliminate any aliasing effects. The greater the oversampling rate, the smaller, simpler, and less expensive the filter. A key benefit of oversampling is that because it produces many more samples in a given time, it has the effect of decreasing the quantization noise floor by spreading it over a wider frequency range. In other words, it improves the signal-to-noise ratio (SNR). This improvement in SNR is called processing gain. The SNR is the ratio of the signal power (Ps) to the noise power (Pn). It is usually expressed in decibels:

For small signal communications applications where the evil noise could mask a weak signal, the disadvantages of oversampling may be overweighed by the positive benefits of the process gain.

Undersampling is defined as sampling a signal at a rate that is less than the desired Nyquist rate of two times the highest frequency in the signal to be digitized. As you have seen, undersampling causes aliasing that upon recovery of the signal in a DAC produces a signal that is much lower in frequency. This is generally an undesirable effect that can be eliminated by adding a low-pass antialiasing filter in front of the ADC to cut off signals that are more than half the sampling rate. On the other hand, this aliasing effect can be used to advantage because it acts as a form of mixing or modulation that transfers a signal from a higher frequency to a lower frequency. This is often done in radio receivers to translate a high-frequency signal to a lower fixed frequency called an intermediate frequency (IF) where it can be more adequately filtered for improved frequency selection. You will learn about this in Article on receivers. The circuit that performs this equivalent of aliasing is called a mixer or down converter. As it turns out, an ADC using undersampling becomes a form of down converter or mixer and can often eliminate mixing stages in modern receivers.

As indicated earlier, to retain all the relevant information in a signal to be digitized, the sampling frequency must to two or more times the maximum frequency component in the target signal. This requirement typically assumes that the spectrum of the signal to be digitized ranges from DC or 0 Hz to some upper frequency fm. However, what the Nyquist requirement really says is that all the information will be retained if the signal is sampled at twice the bandwidth (BW) of the signal. The bandwidth of a signal is simply the difference between the upper (f2) and lower (f1) frequencies defining the bandwidth, or:

BW = f2 – f1

If the spectrum is DC to fm, then the bandwidth is clearly just fm, or:

fm = fm – 0 = fm

However, there are many instances where the signal is clearly a narrow channel around a center frequency. For example, the signal to be digitized could occupy the range of 70 +- 10 MHz or from 60 to 80 MHz. The bandwidth is

BW = 80 – 60 = 20 MHz

What the sampling theorem says is that all the information will be retained if the sampling frequency is at least two times the bandwidth of the signal—or equal to or greater than

fs = 2BW = 2(20) = 40 MHz

Normally we would interpret this as having to use a sampling frequency of two times the upper frequency of 80 MHz. The sampling frequency would need to be at least 2(80) = 160 MHz. Here the sampling theorem is saying we can sample the 60- to 80-MHz signal at a rate of 40 MHz or more, which is clearly undersampling. Therefore, aliasing will occur. What happens is that the original signal is translated to a lower frequency with all the related frequency components that are easily recovered with a DAC, assuming the use of an appropriate filter to get rid of the unwanted frequency components that are generated by this process. An example will illustrate this.

As you saw in Fig. 7-11, the sampling process is amplitude modulation with a rectangular wave producing a spectrum that is a collection of signals that represent the sampling frequency and its harmonics as carriers plus the sidebands based on the modulating signals. The frequencies are fs +- fm plus the harmonics and their sidebands of 2fs +- fm, 3fs +- fm, and so on. This spectrum is produced even in undersampling. Now assume a signal of 70 MHz with a bandwidth of 610 MHz or 20 MHz. The sum and difference frequencies produced by AM are the maximum sidebands of 70 + 10 = 80 MHz and 70 – 10 = 60 MHz. The bandwidth is 20 MHz, so the sampling frequency has to be 40 MHz or greater. Let’s use a sampling frequency of 50 MHz. This produces the spectrum shown in Fig. 7-13A.

The sidebands produced are the images or aliases. In the first case we have fs + fm, or 50 + 70 = 120 MHz and fs – fm, or 50 – 70 = 220 MHz. The difference is a negative frequency, which as it turns out is still a valid signal of 20 MHz. It is this difference signal that is the alias we are interested in. Using this process with the upper- and lower band signals of 60 and 80 MHz produces a spectrum that extends from 10 MHz to 30 MHz, still a bandwidth of 20 MHz.

What we have done is translated the 70 MHz signal down to 20 MHz while retaining all the sidebands and information within the 20 MHz bandwidth. A low-pass filter is used to remove all of the higher-frequency harmonic signals and their aliases. There are several key advantages to undersampling. First, we can use a slower sampling ADC. Slower ADCs are usually much less expensive and the related circuitry is less critical. Second, slower ADCs also typically consume less power.

Third, slower ADCs allow more time between samples for digital signal processing to take place, meaning that a microcomputer or FPGA does not have to be as fast, providing further cost and power savings. Fourth, if memory is used after the ADC, less memory capacity is needed, further reducing cost and power consumption.

The key to a successful undersampling implementation is to choose the sampling frequency carefully. The example above selected an arbitrary 50 MHz because it was more than two times the signal bandwidth. It has been determined that the best sampling frequency can be selected by applying the formulas below. In the first application, the value of Z is determined from a selected sampling rate fs and signal frequency fm.

If Z is not an integer, it is rounded down and used in the second formula to produce the desired actual sampling frequency. Using these formulas ensures that the signal is centered in the lowest Nyquist zone.

Digital Communication | Advantages and Disadvantages

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