# MidPoint Biasing | Miscellaneous Bias Circuits

## What is Midpoint Biasing?

MidPoint Biasing : When an amplifier circuit is so designed that operating point Q lies at the centre of d.c. load line, the amplifier is said to be midpoint biased. When the amplifier is mid-point biased, the Q-point provides values of IC and VCE that are one-half of their maximum possible values. This is illustrated in Fig. 9.36. Since the Q-point is centred on the load line;

Ic = 1/2Ic max I ;

Vce = Vcc/2

When a transistor is used as an amplifier, it is always designed for midpoint bias. The reason is that midpoint biasing allows optimum operation of the amplifier. In other words, midpoint biasing provides the largest possible output. This point is illustrated in Fig. 9.37 where Qpoint is centred on the load line. When an ac signal is applied to the base of the transistor, collector current and collector- emitter voltage will both vary around their Q-point values. Since Q-point is centred, IC and VCE can both make the maximum possible transitions above and below their initial dc values. If Q-point is located above centre on the load line, the input may cause the transistor to saturate. As a result, a part of the output wave will be clipped off. Similarly, if Qpoint is below midpoint on the load line, the input may cause the transistor to go into cut off. This can also cause a portion of the output to be clipped. It follows, therefore, that midpoint biasing amplifier circuit allows the best possible ac operation of the circuit.

Example 9.30. Determine whether or not the circuit shown in Fig. 9.38 (i) is midpoint biased. Solution. Let us first construct the dc load line.

Since VCE is nearly one-half of VCC, the amplifier circuit is midpoint biased.

Note. We can determine whether or not the circuit is midpoint biased without drawing the dc load line. By definition, a circuit is midpoint biased when the Q-point value of VCE is one-half of VCC. Therefore, all that you have to do is to find the operating point Q of the circuit. If the Q-point value of VCE is one-half of VCC, the circuit is midpoint biased.

Example 9.31. Determine whether or not the circuit shown in Fig. 9.39 is midpoint biasing.

Solution. In order to determine whether the circuit is midpoint biasing or not, we shall first find the operating point of the circuit.

Since Q-point value of VCE is approximately one-half of VCC (= 10 V), the circuit is midpoint biased. Note that answer has been obtained without the use of a dc load line.

### Which Value of β to be used ?

While analysing a biasing circuit, we have to refer to the specification sheet for the transistor to obtain the value of β. Normally, the transistor specification sheet lists a minimum value (βmin) and maximum value (βmax) of β. In that case, the geometric average of the two values should be used.

Note. If only one value of β is listed on the specification sheet, we should then use that value.

Example 9.32. Find the value of IB for the circuit shown in Fig. 9.40. Given that β has a range of 100 to 400 when IC = 10 mA.

Solution. Voltage across R2 is

### Miscellaneous Biasing Circuits

In practice, one may find that bias circuits which do not always confirm to the basic forms considered in this chapter. There may be slight circuit modifications. However, such bias circuits should not pose any problem if the basic approach to transistor biasing is understood. We shall solve a few examples to show how the basic concepts of biasing can be applied to any biasing circuit.

Example 9.33. Calculate the operating point of the circuit shown in Fig. 9.41. Given β = 60 and VBE = 0.7V.

Solution. Such a problem should not pose any difficulty. We are to simply find the d.c. values. Note that capacitors behave as open to d.c. Applying Kirchhoff’s voltage law to the path passing through RB , VBE, RE and VEE, we have,

Example 9.34. Find the operating point for the circuit shown in Fig. 9.42. Assume β = 45 and VBE = 0.7V

Example 9.35. It is desired to design the biasing circuit of an amplifier in Fig. 9.43 in such a way to have an operating point of 6V, 1 mA. If transistor has β = 150, find RE , RC , R1 and R2 . Assume VBE = 0.7V

Solution. We are given VCC, β and the operating point. It is desired to find the component values. For good design, voltage across RE (i.e., VE ) should be one-tenth of VCC i.e

## Silicon Versus Germanium

Although both silicon and germanium are used in semiconductor devices, the present day trend is to use silicon. The main reasons for this are :

### (i) Smaller ICBO.

At room temperature, a silicon crystal has fewer free electrons than a germanium crystal. This implies that silicon will have much smaller collector cut off current (ICBO) than that of germanium. In general, with germanium, ICBO is 10 to 100 times greater than with silicon. The typical values of ICBO at 25°C (the figures most often used for normal temperature) for small signal transistors are:

### (ii) Smaller variation of ICBO with temperature.

The variation of ICBO with temperature is less in silicon as compared to germanium. A rough rule of thumb for germanium is that ICBO approximately doubles with each 8 to 10°C rise while in case of silicon, it approximately doubles with each 12°C rise.

### (iii) Greater working temperature.

The structure of germanium will be destroyed at a temperature of approximately 100°C. The maximum normal working temperature of germanium is 70°C but silicon can be operated upto 150°C. Therefore, silicon devices are not easily damaged by excess heat.

### (iv) Higher PIV rating.

The PIV ratings of silicon diodes are greater than those of germanium diodes. For example, the PIV ratings of silicon diodes are in the neighbourhood of 1000V whereas the PIV ratings of germanium diodes are close to 400V. The disadvantage of silicon as compared to germanium is that potential barrier of silicon diode (0.7V) is more than that of germanium diode (0.5V). This means that higher bias voltage is required to cause current flow in a silicon diode circuit. This drawback of silicon goes to the background in view of the other advantages of silicon mentioned above. Consequently, the modern trend is to use silicon in semiconductor devices.

Example 9.36. A small signal germanium transistor operating at 25°C has ICBO = 5 µA, β = 40 and zero signal collector current = 2mA.

(i) Find the collector cut- off current i.e. ICEO.

(ii) Find the percentage change in zero signal collector current if the temperature rises to 55°C. Assume ICBO doubles with every 10°C rise.

(iii) What will be the percentage change in silicon transistor under the same conditions? Given that ICBO for silicon is 0.1µA at 25°C and ICBO doubles for every 10°C rise

= 4.1 µA = 0.0041 mA

A 30°C rise in temperature would cause ICEO in silicon to increase 8 times.

Now ICEO = 8 × 0.0041 = 0.0328 mA

∴ Zero signal collector current at 55°C

= 2 + 0.0328 = 2.0328 mA

Percentage change in zero signal collector current

= (2.0328 – 2)/ 2 x100 = 1.6 %

i.e., increase in zero signal collector current is 1.6%.

Comments. The above example shows that change in zero signal collector current with rise in temperature is very small in silicon as compared to germanium. In other words, temperature effects very slightly change the operating point of silicon transistors while they may cause a drastic change in germanium transistors. This is one of the reasons that silicon has become the main semiconductor material in use today.

Example 9.37. A silicon transistor has ICBO = 0.02µA at 27°C. The leakage current doubles for every 6°C rise in temperature. Calculate the base current at 57°C when the emitter current is 1mA. Given that α = 0.99.

Solution. A 30°C (57 – 27 = 30) rise in temperature would cause ICBO to increase 32 times.

### Instantaneous Current and Voltage Waveforms

It is worthwhile to show instantaneous current and voltage waveforms in an amplifier. Consider a CE amplifier biased by base resistor method as shown in Fig. 9.44. Typical circuit values have been assumed to make the treatment more illustrative. Neglecting VBE, it is clear that zero signal base current IB = VCC/RB = 20 V/1MΩ = 20 µA. The zero signal collector current IC = βIB = 100 × 20 µA = 2mA. When a signal of peak current 10 µA is applied, alternating current is superimposed on the d.c. base current. The collector current and collector-emitter voltage also vary as the signal changes. The instantaneous waveforms of currents and voltages are shown in Fig. 9.45. Note that base current, collector current and collector-emitter voltage waveforms are composed of

(i) the d.c. component and (ii) the a.c. wave riding on the d.c. (i) At π/2 radians, the base current is composed of 20 µA d.c. component plus 10 µA peak a.c. component, adding to 30 µA i.e iB = 20 + 10 = 30 µA. The corresponding collector current iC = 100 × 30 µA = 3 mA. The corresponding collector-emitter voltage is vCE = VCC − iC RC = 20 V − 3 mA × 5 kΩ = 20 V − 15 V = 5 V

Note that as the input signal goes positive, the collector current increases and collector-emitter voltage decreases. Moreover, during the positive half cycle of the signal (i.e. from 0 to π rad.), the operating point moves from 20 µA to 20 + 10 = 30 µA and then back again i.e. operating point follows the path Q to C and back to Q on the load line.

(ii) During the negative half-cycle of the signal (from π to 2π rad.), the operating point goes from 20 µA to 20 – 10 = 10 µA and then back again i.e. the operating point follows the path Q to D and back to Q on the load line.

(iii) As the operating point moves along the path CD or DC due to the signal, the base current varies continuously. These variations in the base current cause both collector current and collectoremitter voltage to vary.

(iv) Note that when the input signal is maximum positive, the collector-emitter voltage is maximum negative. In other words, input signal voltage and output voltage have a phase difference of 180°. This is an important characteristic of CE arrangement.

Example 9.38. What fault is indicated in Fig. 9.46 ? Explain your answer with reasons.

Solution. Since VB (i.e., base voltage w.r.t. ground) is zero, it means that there is no path for current in the base circuit. The transistor will be biased off i.e., IC = 0 and IE = 0. Therefore, VC = 10 V ( IC RC = 0) and VE = 0. The obvious fault is that R1 is open.

Example 9.39. What fault is indicated in Fig. 9.47? Explain your answer with reasons.

Solution. Based on the values of R1 , R2 and VCC , the voltage VB at the base seems appropriate. In fact it is so as shown below :

## Summary Of Transistor Midpoint Biasing Circuits

In figures below, npn transistors are shown. Supply voltage polarities are reversed for pnp transistors

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