Frequency Demodulator: Any circuit that will convert a frequency variation in the carrier back to a proportional voltage variation can be used to demodulate or detect FM signals. Circuits used to recover the original modulating signal from an FM transmission are called demodulators, detectors, or discriminators.
The simplest frequency demodulator, the slope detector, makes use of a tuned circuit and a diode detector to convert frequency variations to voltage variations. The basic circuit is shown in Fig. 6-12(a). This has the same configuration as the basic AM diode detector described in Chap. 4, although it is tuned differently.
The FM signal is applied to transformer T1 made up of L1 and L2. Together L2 and C1 form a series resonant circuit. Remember that the signal voltage induced into L2 appears in series with L2 and C1 and the output voltage is taken from across C1. The response curve of this tuned circuit is shown in Fig. 6-12(b). Note that at the resonant frequency fr the voltage across C1 peaks. At lower or higher frequencies, the voltage falls off. To use the circuit to detect or recover FM, the circuit is tuned so that the center or carrier frequency of the FM signals is approximately centered on the leading edge of the response curve, as shown in Fig. 6-12(b). As the carrier frequency varies above and below its center frequency, the tuned circuit responds as shown in the figure. If the frequency goes lower than the carrier frequency, the output voltage across C1 decreases.
If the frequency goes higher, the output across C1 goes higher. Thus, the ac voltage across C1 is proportional to the frequency of the FM signal. The voltage across C1 is rectified into dc pulses that appear across the load R1. These are filtered into a varying dc signal that is an exact reproduction of the original modulating signal. The main difficulty with slope detectors lies in tuning them so that the FM signal is correctly centered on the leading edge of the tuned circuit. In addition, the tuned circuit does not have a perfectly linear response. It is approximately linear over a narrow range, as Fig. 6-12(b) shows, but for wide deviations, amplitude distortion occurs because of the nonlinearity.
The slope detector is never used in practice, but it does show the principle of FM demodulation, i.e., converting a frequency variation to a voltage variation. Numerous practical designs based upon these principles have been developed. These include the Foster Seeley discriminator and the ratio detector, neither of which is used in modern equipment.
A simplified block diagram of a pulse-averaging discriminator is illustrated in Fig. 6-13. The FM signal is applied to a zero-crossing detector or a clipper-limiter that generates a binary voltage-level change each time the FM signal varies from minus to plus or from plus to minus. The result is a rectangular wave containing all the frequency variations of the original signal but without amplitude variations. The FM square wave is then applied to a one-shot (monostable) multivibrator that generates a fixed-amplitude, fixed-width dc pulse on the leading edge of each FM cycle. The duration of the one shot is set so it is less than one-half the period of the highest frequency expected during maximum deviation. The one-shot output pulses are then fed to a simple RC low-pass filter that averages the dc pulses to recover the original modulating signal.
The waveforms for the pulse-averaging discriminator are illustrated in Fig. 6-14. At low frequencies, the one-shot pulses are widely spaced; at higher frequencies, they occur very close together. When these pulses are applied to the averaging filter, a dc output voltage is developed, the amplitude of which is directly proportional to the frequency deviation. When a one-shot pulse occurs, the capacitor in the filter charges to the amplitude of the pulse. When the pulse turns off, the capacitor discharges into the load.
If the RC time constant is high, the charge on the capacitor does not decrease much. When the time interval between pulses is long, however, the capacitor loses some of its charge into the load, so the average dc output is low. When the pulses occur rapidly, the capacitor has little time between pulses to discharge; the average voltage across it therefore remains higher. As the figure shows, the filter output voltage varies in amplitude with the frequency deviation. The original modulating signal is developed across the filter output. The filter components are carefully selected to minimize the ripple caused by the charging and discharging of the capacitor while at the same time providing the necessary high-frequency response for the original modulating signal.
Some pulse-averaging discriminators generate a pulse every half-cycle or at every zero crossing instead of every one cycle of the input. With a greater number of pulses to average, the output signal is easier to filter and contains less ripple. The pulse-averaging discriminator is a very high-quality frequency demodulator. In the past, its use was limited to expensive telemetry and industrial control applications. Today, with the availability of low-cost ICs, the pulse-averaging discriminator is easily implemented and is used in many electronic products.
The quadrature detector uses a phase-shift circuit to produce a phase shift of 90° at the unmodulated carrier frequency. The most commonly used phase-shift arrangement is shown in Fig. 6-15. The frequency-modulated signal is applied through a very small capacitor (C1) to the parallel-tuned circuit, which is adjusted to resonate at the center carrier frequency. At resonance, the tuned circuit appears as a high value of pure resistance. The small capacitor has a very high reactance compared to the tuned circuit impedance. Thus, the output across the tuned circuit at the carrier frequency is very close to 90° and leads the input.
When frequency modulation occurs, the carrier frequency deviates above and below the resonant frequency of the tuned circuit, resulting in an increasing or a decreasing amount of phase shift between the input and the output. The two quadrature signals are then fed to a phase detector circuit. The most commonly used phase detector is a balanced modulator using differential amplifiers like those discussed in other article.
The output of the phase detector is a series of pulses whose width varies with the amount of phase shift between the two signals. These signals are averaged in an RC low-pass filter to recreate the original modulating signal. Normally the sinusoidal FM input signals to the phase detector are at a very high level and drive the differential amplifiers in the phase detector into cutoff and saturation. The differential transistors act as switches, so the output is a series of pulses. No limiter is needed if the input signal is large enough. The duration of the output pulse is determined by the amount of phase shift. The phase detector can be regarded as an AND gate whose output is ON only when the two input pulses are ON and is OFF if either one or both of the inputs are OFF.
Fig. 6-16 shows the typical waveforms involved in a quadrature detector. When there is no modulation, the two input signals are exactly 90° out of phase and therefore provide an output pulse with the indicated width. When the FM signal frequency increases, the amount of phase shift decreases, resulting in a wider output pulse. The wider pulses averaged by the RC filter produce a higher average output voltage, which corresponds to the higher amplitude required to produce the higher carrier frequency. When the signal frequency decreases, greater phase shift and narrower output pulses occur. The narrower pulses, when averaged, produce a lower average output voltage, which corresponds to the original lower-amplitude modulating signal.
A phase-locked loop (PLL) is a frequency- or phase-sensitive feedback control circuit used in frequency demodulation, frequency synthesizers, and various filtering and signal detection applications. All phase-locked loops have the three basic elements, shown in Fig. 6-17.
1. A phase detector is used to compare the FM input, sometimes referred to as the reference signal, to the output of a VCO.
2. The VCO frequency is varied by the dc output voltage from a low-pass filter.
3. The low-pass filter smoothes the output of the phase detector into a control voltage that varies the frequency of the VCO. The primary job of the phase detector is to compare the two input signals and generate an output signal that, when filtered, will control the VCO. If there is a phase or frequency difference between the FM input and VCO signals, the phase detector output varies in proportion to the difference. The filtered output adjusts the VCO frequency in an attempt to correct for the original frequency or phase difference. This dc control voltage, called the error signal, is also the feedback in this circuit.
When no input signal is applied, the phase detector and low-pass filter outputs are zero. The VCO then operates at what is called the free-running frequency, its normal operating frequency as determined by internal frequency-determining components. When an input signal close to the frequency of the VCO is applied, the phase detector compares the VCO free-running frequency to the input frequency and produces an output voltage proportional to the frequency difference. Most PLL phase detectors operate just as the one discussed in the section on quadrature detectors.
The phase detector output is a series of pulses that vary in width in accordance with the amount of phase shift or frequency difference that exists between the two inputs. The output pulses are then filtered into a dc voltage that is applied to the VCO. This dc voltage is such that it forces the VCO frequency to move in a direction that reduces the dc error voltage. The error voltage forces the VCO frequency to change in the direction that reduces the amount of phase or frequency difference between the VCO and the input.
At some point, the error voltage causes the VCO frequency to equal the input frequency; when this happens, the PLL is said to be in a locked condition. Although the input and VCO frequencies are equal, there is a phase difference between them, usually exactly 90°, which produces the dc output voltage that will cause the VCO to produce the frequency that keeps the circuit locked. If the input frequency changes, the phase detector and low-pass filter produce a new value of dc control voltage that forces the VCO output frequency to change until it is equal to the new input frequency. Any variation in input frequency is matched by a VCO frequency change, so the circuit remains locked.
The VCO in a PLL is, therefore, capable of tracking the input frequency over a wide range. The range of frequencies over which a PLL can track an input signal and remain locked is known as the lock range. The lock range is usually a band of frequencies above and below the free-running frequency of the VCO. If the input signal frequency is out of the lock range, the PLL will not lock. When this occurs, the VCO output frequency jumps to its free-running frequency. If an input frequency within the lock range is applied to the PLL, the circuit immediately adjusts itself into a locked condition.
The phase detector determines the phase difference between the free-running and input frequencies of the VCO and generates the error signal that forces the VCO to equal the input frequency. This action is referred to as capturing an input signal. Once the input signal is captured, the PLL remains locked and will track any changes in the input signal as long as the frequency is within the lock range. The range of frequencies over which a PLL will capture an input signal, known as the capture range, is much narrower than the lock range, but, like the lock range, is generally centered on the free-running frequency of the VCO (see Fig. 6-18).
The characteristic that causes the PLL to capture signals within a certain frequency range causes it to act as a band pass filter. Phase-locked loops are often used in signal conditioning applications, where it is desirable to pass signals only in a certain range and to reject signals outside of that range. The PLL is highly effective in eliminating the noise and interference on a signal. The ability of a PLL to respond to input frequency variations makes it useful in FM applications.
The PLL’s tracking action means that the VCO can operate as a frequency modulator that produces exactly the same FM signal as the input. In order for this to happen, however, the VCO input must be identical to the original modulating signal. The VCO output follows the FM input signal because the error voltage produced by the phase detector and low-pass filter forces the VCO to track it. Thus, the VCO output must be identical to the input signal if the PLL is to remain locked.
The error signal must be identical to the original modulating signal of the FM input. The low-pass filter cutoff frequency is designed in such a way that it is capable of passing the original modulating signal. The ability of a PLL to provide frequency selectivity and filtering gives it a signal to-noise ratio superior to that of any other type of FM detector.
The linearity of the VCO ensures low distortion and a highly accurate reproduction of the original modulating signal. Although PLLs are complex, they are easy to apply because they are readily available in low-cost IC form. Fig. 6-19 is a block diagram of an IC PLL, the 565. The 565 is connected as an FM demodulator. The 565 circuitry is shown inside the dashed lines; all components outside the dashed lines are discrete components. The numbers on the connections are the pin numbers on the 565 IC, which is housed in a standard 14-pin dual-in-line package (DIP). The circuit is powered by 612-V power supplies.
The low-pass filter is made up of a 3.6-kV resistor inside the 565 that terminates at pin 7. A 0.1-μF external capacitor C2 completes the filter. Note that the recovered original modulating signal is taken from the filter output. The free-running frequency of the VCO ( f0) is set by external components R1 and C1 according to the formula f0 = 1.2/4R1C1 = 1.2/4(2700)(0.01 x 1026 ) = 11,111 Hz or 11.11 kHz. The lock range fL can be computed with an expression supplied by the manufacturer for this circuit fL = 16f0/VS, where VS is the total supply voltage.
In the circuit of Fig. 6-19, VS is the sum of the two 12-V supplies, or 24 V, so the total lock range centered on the free-running frequency is fL = 16(11.11 x 103 )/24 = 7406.7 Hz, or 63703.3 Hz. With this circuit, it is assumed that the unmodulated carrier frequency is the same as the free-running frequency, 11.11 kHz. Of course, it is possible to set this type of circuit to any other desired center frequency simply by changing the values of R1 and C1. The upper frequency limitation for the 565 IC is 500 kHz.
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